FIGS. 1A and 1B show a classic analog radio receiver and a fully digital, radio frequency receiver. The core of a conventional radio receiver comprises a circuit that mixes the input radio signal from the antenna with a local oscillator (LO). Both the LO and the mixer are analog devices. The mixer generates frequency components corresponding to the sum and difference of the input frequencies of the radio frequency (RF) signal and the LO. An analog low-pass filter (LPF) is used to isolate the down-converted baseband signal, which can then be digitized in a baseband analog-to-digital converter (ADC). FIG. 1A shows a quadrature receiver (also called an I&Q receiver) with a local oscillator having in-phase and quadrature (90-degree phase shifted) outputs, which are mixed with the input RF signal to produce I and Q signals, respectively. The baseband I and Q signals can be combined in a Digital Baseband Processor to demodulate one or more communication signals of interest.
In a digital radio frequency receiver (sometimes known as a software radio or software-defined radio or SDR), the conversion to digital is carried out directly on the RF signal coming from the antenna. As indicated in FIG. 1B, the same set of operations need to be carried out as in FIG. 1A, but now in the digital domain. These include a digital LO, a digital mixer (really a digital multiplier), and a digital decimation filter (DDF, the digital equivalent of a low-pass filter). These digital operations are implemented without noise, interference, or non-ideal behavior, and may be easily reprogrammed for different communication parameters. Furthermore, the digital radio frequency receiver is compatible with a very broad RF bandwidth, which may comprise a plurality of communication signals. These advantages are increasingly desirable for modern RF receivers. However, a requirement of the digital radio frequency approach is that for optimum performance, the RF ADC must operate at a very high sample rate (typically multi-GHz), and in some cases also needs a plurality of parallel data bits to increase the dynamic range. This high rate requirement is because the sampling should be above the Nyquist rate (twice the highest frequency component of the signal), but in some cases the radio frequency signal can be undersampled, so long as the sampling is precisely timed. Assuming that undersampling is not, or cannot be used, the following mixer and digital filter must also operate at the very high data rate, with a plurality of data bits. These requirements have limited the availability of such a digital radio frequency receiver. See, e.g., U.S. Pat. Nos. 7,956,640; 7,928,875; 7,903,456; 7,876,869; 7,728,748; 7,701,286; 7,680,474; 7,598,897; 7,443,719; 7,362,125; 7,313,199; 7,280,623; 6,781,435; Muhammad, K.; Staszewski, R. B.; Leipold, D.; “Digital RF processing: toward low-cost reconfigurable radios”, IEEE Communications Magazine, August 2005, Volume: 43 Issue:8, pages: 105-113; Brock, D. K.; Mukhanov, O. A.; Rosa, J.; “Superconductor digital RF development for software radio”, IEEE Communications Magazine, February 2001, Volume: 39 Issue:2, page(s): 174-179; Saulnier, G. J.; Puckette, C. M., IV; Gaus, R. C., Jr.; Dunki-Jacobs, R. J.; Thiel, T. E.; “A VLSI demodulator for digital RF network applications: theory and results”; IEEE Journal on Selected Areas in Communications, October 1990, Volume: 8 Issue:8, page(s): 1500-1511, each of which is expressly incorporated herein by reference.
Superconducting electronics using rapid-single-flux-quantum (RSFQ) circuits provide the world's fastest digital circuits (operating at rates of up to 40 GHz and higher). And indeed, very fast RSFQ ADCs, digital mixers, and digital filters have been demonstrated. However, most of these circuits have been relatively small circuits, operating on a single bitstream of data. See, for example, U.S. application Ser. No. 11/966,897, “Oversampling Digital Receiver for Radio Frequency Signals”, D. Gupta, and U.S. Pat. No. 7,280,623, “Digital RF Correlator for Multipurpose Digital Signal Processing”, D. Gupta, et al., both of which are expressly incorporated herein by reference.
For the case of a superconducting digital mixer, several designs of a fast single-bit RSFQ digital mixer were presented by Kirichenko et al. (“Superconducting Digital Mixer”, U.S. Pat. No. 7,680,474), expressly incorporated herein by reference, one of which is shown schematically in FIG. 2. This is based on the mapping convention of FIG. 3A, where binary multiplication of a bipolar signal maps onto the exclusive OR (XOR) function of a unipolar binary signal.
To improve this technology and to make it more practical, multibit implementations must be developed. The present invention focuses on the development of an integrated multibit digital mixer based on RSFQ technology, building upon the foundations of an earlier single-bit mixer of Kirichenko.